NAME=PPC64 ELFv1 ET_REL kernel module recognized as ppc64 big-endian
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=iI~arch ;iI~bits ;iI~class ;iI~endian
EXPECT=<<EOF
arch     ppc
bits     64
class    ELF64
endian   big
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: R_PPC64_REL24 maps to ADD_24
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=ir~?ADD_24
EXPECT=<<EOF
13
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: REL24 reloc encodes -(st64)P addend (S - P + A convention)
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=ir~ADD_24:0
EXPECT=<<EOF
0x080000c4 0x000000c4 ADD_24 10    ._mcount - 0x080000c4
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: REL24 unique target imports
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=ir~ADD_24[4]
EXPECT=<<EOF
._mcount
._mcount
._mcount
._mcount
._mcount
.crc32_le
._mcount
.crc32_le
._mcount
.crc32_le
._mcount
.crypto_register_shash
.crypto_unregister_shash
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: R_PPC64_TOC/TOC16 map to ADD_16 (incl. .rela.init.text TOC16_HA/LO_DS)
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=ir~?ADD_16
EXPECT=<<EOF
13
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: R_PPC64_ADDR64 in .opd produces SET_64 entries
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=ir~?SET_64
EXPECT=<<EOF
22
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: all .rela.* sections loaded (per-section cap fix, was 23)
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=ir~?
EXPECT=<<EOF
50
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: .opd ADDR64 relocs resolve to distinct vaddrs (S + A, not collapsed)
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=ir~SET_64[0]
EXPECT=<<EOF
0x080000b0
0x080000f0
0x08000130
0x080001a0
0x080001f0
0x08000270
0x080002f0
0x08000358
0x0800038c
0x08000708
0x08000720
0x08000738
0x08000738
0x08000750
0x08000768
0x08000780
0x08000798
0x080007b0
0x080007c8
0x080007c8
0x080007e0
0x08000a00
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: .rela.init.text REL24 now applied (2nd section no longer capped)
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=pi 1 @ section..init.text+0x1c
EXPECT=<<EOF
bl reloc..crypto_register_shash
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: applied REL24 bl lands exactly on its reloc target flag
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=pi 1 @ 0x080000c4;pi 1 @ 0x08000234;s 0x080000c4;fd `ao~jump[1]`;s 0x08000234;fd `ao~jump[1]`
EXPECT=<<EOF
bl reloc.._mcount
bl reloc..crc32_le
reloc.._mcount
reloc..crc32_le
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: REL24 patched bytes are big-endian (high byte first)
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=p8 4 @ 0x080000c4
EXPECT=<<EOF
48001b6d
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: imports include _mcount and crc32_le
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=ii~mcount,crc32[4]
EXPECT=<<EOF
._mcount
.crc32_le
_mcount
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: 10 .rela sections present
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=iS~?RELA
EXPECT=<<EOF
10
EOF
RUN

NAME=PPC64 ELFv1 (regression): shared lib JMP_SLOT vaddr unchanged by ET_REL gating
FILE=bins/elf/ppc64v1-libz.so
ARGS=-e bin.relocs.apply=true
CMDS=ir~strlen[0]
EXPECT=<<EOF
0x000304d8
EOF
RUN

NAME=aarch64 ET_DYN (regression): reloc count unchanged by ET_REL gating
FILE=bins/elf/ls-toybox
CMDS=ir~?
EXPECT=<<EOF
331
EOF
RUN

NAME=aarch64 ET_REL (regression): section-symbol relocs collapse to base, not S + A
FILE=bins/elf/random_39855/random_39855.oo
ARGS=-e bin.relocs.apply=true
CMDS=ir~ADD_32[0]|sort -u
EXPECT=<<EOF
0x08000040
0x080057dc
0x080057f0
0x080057f4
0x080057f8
0x08005960
0x08005978
0x08005988
0x08012677
0x0801267f
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: applied REL24 branch target is 4-byte aligned
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=s 0x08000154;ao~jump
EXPECT=<<EOF
jump: 0x08001c30
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: reloc flag sits exactly on the aligned REL24 branch target
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=fd 0x08001c30
EXPECT=<<EOF
reloc.._mcount
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: applied REL24 calls produce CALL xrefs to the named target
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=aaa;axt @ 0x08001c30~?
EXPECT=<<EOF
8
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: TOC16_LO_DS reloc applied to ld immediate
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=pi 2 @ 0x0800036c
EXPECT=<<EOF
addis r9, r2, 0
ld r3, -0x8000(r9)
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: TOC16_LO_DS patches the DS halfword keeping the ld sub-opcode
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=p8 4 @ 0x08000370
EXPECT=<<EOF
e8698000
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: TOC base auto-resolved from .toc + 0x8000 when .opd descriptor is unfilled
FILE=bins/elf/ppc64v1-crc32_generic.ko
CMDS=ar r2
EXPECT=<<EOF
0x08008700
EOF
RUN

NAME=PPC64 ELFv1 ET_REL: auto TOC base resolves addis+ld pair to a concrete data pointer
FILE=bins/elf/ppc64v1-crc32_generic.ko
ARGS=-e bin.relocs.apply=true
CMDS=ao 2 @ 0x0800036c~ptr
EXPECT=<<EOF
ptr: 0x08000700
EOF
RUN

NAME=PPC64 ELFv1 EXEC: TOC base still taken from the .opd descriptor (opd path preferred)
FILE=bins/elf/ppc64v1-more
CMDS=ar r2
EXPECT=<<EOF
0x00037f00
EOF
RUN
